Communication devices, such as transceivers, can be used to transmit or receive voice data or other data from other communication devices. The voice data or other data can be communicated via a wireline or wireless communication connection. The trend has been to increase the amount of data that can be communicated and the speed of communication of data.
As communication data rates, speeds, and bandwidths grow, the circuits used to transmit, process, and receive data also have to process high bandwidth signals. One component used by many systems using digital signal processing is an analog-to-digital converter (ADC) that can be used to convert analog signals (e.g., voice signals) into a digital form for further digital signal processing. One approach for designing an ADC that can support relatively high bandwidth with high sampling speeds is to interleave an array of ADCs (e.g., an array of sub-ADCs), wherein each sub-ADC of the array can operate at a relatively lower speed. The lower sampling digital data samples from the sub-ADCs of the array can be combined to generate a high-speed digital data stream. This can enable the sub-ADCs of the array to operate at lower speeds and so the sub-ADCs can be designed with the limitation of current integrated circuit processing technology. A challenge with such a conventional interleaved ADC design can be that any processing differences between the sub-ADCs can contribute to the distortion of the combined digital stream. Such processing differences or mismatches can include, for example, different low-frequency offsets, bulk gains, delays, and more generally, different path transfer functions associated with the sub-ADCs of the array.
System designers often can attempt to design an ADC array such that these path differences can be relatively small. However, for more efficient area and power designs for high-speed communication systems, there can be undesirable power and area penalties incurred as well as more complex circuit designs being employed to keep these distortions at an acceptable level. These penalties can be significant and can contribute significantly to the system's power and area requirements, and it can therefore be desirable to avoid such penalties and power and area requirements.
Also, in conventional systems, auxiliary hardware, such as a digital-to-analog converter (DAC), often can be used (e.g., and/or required) to correct these distortions by generating a test/calibration signal that can be used to calibrate or correct the path differences. Such a conventional design can add to the cost and complexity of the system and/or can be of limited use, for example, if the test signal interferes with the communication channel's signal transmission, and thus, as a result, such calibration typically only can be allowed to be carried out during specific time periods before data is actually being transmitted on the communication channel.
Another conventional method for correcting such distortions associated with an array of sub-ADCs can be using sampling arrays that can oversample the received signal, wherein the information gleaned from oversampling the received signal can be used to calibrate and correct the processing path differences associated with the sub-ADCs. However, such conventional approach can significantly complicate the system design and can result in an undesirably higher amount of power and area being used for the system design because of the higher sampling speed used to obtain the oversampled channel signal.
Some other conventional methods for correcting such distortions associated with an array of sub-ADCs can include adding another ADC or one or more sub-ADCs that can be used to calibrate the paths of the other sub-ADCs of the array that can be used to process the actual channel signal. However, these conventional methods also can employ to undesirably costly and inefficient system designs.
The above-described description is merely intended to provide a contextual overview of current systems associated with transceivers and is not intended to be exhaustive.